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  application note 1/6 AN472/0692 drive circuit for integration with igbts by c. licitra, s. musumeci, a. raciti, a. galluzzo, r. letor, m. melito abstract lgbt devices are increasingly used in power electronic equipment due their high power handling capability. the present paper deals with the problems that concern the turn-on, turn-off and short-circuit of these devices. an optimal new driving circuit is proposed that gives excellent device output performance. experimental oscillogram traces of transient condition tests are given, which clearly demonstrate the advantages of using the new driving circuit. finally, the suitability of the driving circuit for integration is analysed. 1. introduction recent developments in industrial power electronic applications have demanded a concerted effort be made to produce new electronic devices, able to handle high currents, voltages and frequencies, as well as being easy to control. among the innovative new electronic products, lgbts are increasingly used in high voltage applications, > 500v up to frequencies of 20khz to 30khz. essentially lgbt components have the following characteristics: ? both turn-on and turn-off capability by means of an applied voltage to the gate requiring only low driving power, equivalent to that which is required by mosfet structures. ? low direct voltage drop and high current density like bjt devices. the former is a very important point because it implies a loss reduction, hence costs decrease in making the driving stage, while the latter makes it suitable for high current applications. igbt structures can be represented by means of a simplified circuit using two devices, a mosfet and a bjt, as shown in figure 1. lgbts are very user- friendly to drive, but in order to obtain the best performance they require suitable driving techniques [1] [2]. in this paper the most important phenomena occurring during the switching are discussed, with the aim of analysing and optimising the lgbt behaviour. in particular, an original driving circuit is proposed able to function during turn-on, turn-off and short-circuit conditions and is a powerful tool for improving igbt performance. moreover, the proposed driving circuit provides suitable protection for avoiding switch failure during stress conditions. extensive laboratory tests have been carried out to demonstrate the advantages of the new driving circuit in comparison to the more traditional ones. 2. the driving circuit the proposed circuit, shown in figure 2, can be ideally split in three main functional blocks and an output stage. the output stage is a push-pull scheme with separated turn-on and turn-off paths for driving the gate terminal. the main functional blocks contain circuitry for improving turn-on, improving turn-off and providing short-circuit protection. the following sections explain in more details the behaviour of lgbts during the transients. a 30a, 500v igbt was used in the laboratory tests. its main characteristics are: bv ces > 500v @ i c = 250 m a v ce(sat) < 3.3v @ i c = 30a and v g =15v c iss = 2500pf typical c oss = 330pf typical c rss = 80pf typical figure 1. simplified equivalent circuit of an igbt
application note 2/6 enough to reduce power losses without any increase in electromagnetic interference. during turn-on in inductive load switching, the power losses mainly depend on both the di/dt, which influences the peak current due to the diode recovery, and the dynamic saturation voltage phenomenon. moreover, the di/dt influences the emi [4]. in the circuit of figure 4, the voltage drop caused by the stray inductance l s1 of the emitter ground connection, reduces the drive current i g that is defined by the equation: i g = (v d - v g - (l s1 x di/dt))/r g (1) and moreover acts as a negative feedback during the current rise time. taking into account the effect of l s1 , the di/dt gradient can be calculated by the relationship: di/dt = v d - v th / (r g c ge / g fs ) + l s1 where v th , c ge , and g fs depend on the particular device; l s1 , and v d are fixed by the circuit. the only way to manage the di/dt is to act on the gate resistance. in order to reduce the emi it is better to reduce di/dt by increasing r g , but that means reduction of the switching speed and hence increased power losses [5]. to solve the problem described above, the proposed circuit acts as follows. the initial gate current is fixed by adjusting r g(on) in agreement with both device electrical specifications and emi requirements. when the collector current reaches its maximum value, the collector voltage starts to decrease and in this condition the circuit figure 2. schematic of igbt drive circuit figure 3. parasitic capacitances affecting the dynamic behaviour of igbts figure 4. parameters influencing di/dt at turn- on 2.1 turn-on the dynamic behaviour of an igbt is affected by the unavoidable parasitic capacitances of the structure, often referred to as c ge , c ce and c cg . they are shown in figure 3. such parasitic capacitances together with stray inductances, gate bias, and driving impedance define the device performance in terms of switching speed and power losses. the switching speed of a device having an insulated gate, i.e. voltage driven, is strictly related to the rate of supplying charge to the gate input capacitance [3]. this is true for lgbts too, except during the falling edge of the collector current. the target of the device designer is to obtain a switching speed fast
3/6 application note enables a current generator. the current generator increases the gate current making the collector voltage fall faster and so eliminating the dynamic saturation voltage phenomenon. the delay between the positive edge of input signal and the duration of the enable signal of the current generator are both adjustable and so the best match between driving circuit and device is obtainable. figure 5 shows the gate and collector waveforms at turn-on with traditional driving (i.e. only gate resistance), whereas figure 6 shows the same waveforms when the proposed driving circuit is used. note that the di/dt is the same, 200a/ m s whilst the cross-over time is reduced by about 50%. 2.2 turn-off at turn-off the gate voltage starts to decrease from v d until it reaches the miller value. at the same time the collector voltage increases slightly as shown by the output characteristics with i c = constant. at this point the collector voltage increases rapidly to its maximum value, causing the modulation of the collector-gate capacitance (miller effect). during the miller effect v g is constant. then, the collector current begins to fall quickly, due to the turn-off of the igbt pmos part and thereafter it continues with a tail due to the recombination of minority carriers in the substrate - this is the turn-off phase of the pnp transistor with open base. this tail, responsible for major losses, is strongly related to the device construction technology, and its effects cannot be reduced by means of the driving circuit. turn-off losses can be only controlled during both the miller effect and the pmos turn-off phases and with the aim being to reduce losses it is necessary to decrease the value of r g [6]. as consequence of a reduction in gate resistance, dv/dt increases and so losses decrease, but it is necessary to take care not to exceed the rbsoa limits. in fact, the latching current and the rbsoa are strongly related to dv/dt, i.e. with the value of r g . figure 7 shows how the latching current depends on the gate resistance value. the manufacturer guarantees the rbsoa with a carefully specified r g minimum value. based only on the above criteria, the gate impedance in bridge configurations has a high value, making figure 6. turn-on with improved drive circuit figure 5. turn-on with conventional drive circuit figure 7. latching current versus gate resistance
application note 4/6 the circuit susceptible to spurious turn-on of the lgbts, if an excessive dv/dt occurs across one of the devices in the off- state [7]. in fact, the voltage drop across the gate impedance, due to the current that flows through c cg , figure 3, can reach the threshold voltage and so switch-on the device. figure 8 shows the spurious turn-on phenomenon, when the device under test is subjected to a dv/dt of 2kv/ m s. in this case the energy lost has been calculated as about 350 m j. at turn-off the proposed circuit acts only through r g off , that is fixed in agreement with the device electrical specifications. during the off-state phase, the proposed driving circuit avoids the spurious turn-on by reducing the gate impedance by a large amount, so preventing the gate voltage from reaching the threshold voltage. such transient phenomenon is evident in figure 9, which shows the lgbt improved waveforms under the same test conditions of figure 8, 2kv/ m s. note that the collector current trace shown in figure 9 is not due to spurious turn- on, but it is the unavoidable current necessary to charge the output capacitance of the device. 2.3 short-circuit when a short-circuit occurs in the collector path, the current starts to increase until it reaches its maximum value, that is defined by the supply voltage, the gain of the device and the gate voltage. the devices that have good current performance, i.e. high gain, can fail under short circuit stresses and hence they need to be protected [8]. the presence of high voltage and high current simultaneously into the device, causes instantaneous very high power losses, consequently the device temperature increases. if the stress duration exceeds that specified in the data sheet, failure occurs. the proposed circuit operates by reducing the conduction time when a short circuit is detected by a high voltage, fast recovery diode that senses the igbt desaturation [9]. an adjustable time delay inhibits the protection at turn-on, in order to allow for inrush currents. the relevant traces of current and various voltages during a short-circuit transient are shown in figure 10. from these it is evident how the protection block operates figure 8. traces during spurious turn-on caused by 2kv/ m m m m m s dv/dt figure 10. traces during operation of short- circuit protection figure 9. improved behaviour with new drive circuit in prescence of di/dt
5/6 application note preventing the fail condition. note that the current peaks above 300a during the protection inhibit period due to the high current gain. 2.4 integration the proposed circuit has been developed having as the target its possible integration. in the case of driving circuit integration separated from the power device, bipolar or bcd technologies can be used, taking into account the necessity to provide external delay adjustments, in order to match it to several different devices. at the present time, integration of the driving circuit and power stage on the same chip is possible with vi power technology using a power mosfet output stage. it has not yet been accomplished using lgbt output stages. conclusions the characteristics of an optimal driving circuit for lgbt devices have been analysed. experimental evaluation of igbt performance has been carried out with both traditional and new driving circuits. the aim has been to demonstrate the advantages of the new proposals. the most important results obtained can be summarised as follows: ? in turn-on conditions the circuit provides separate control of the voltage and current gradients, so reducing both power losses and emi, ? in turn-off conditions, the spurious triggering caused by sharp voltage gradients are avoided by means of a low impedance path offered by the driving circuit. thus the power losses related to switching are reduced to a minimum value due to the output parasitic capacitance, ? in short-circuit conditions, the device is protected and turned-off in a preset time depending on the maximum time fixed by the manufacturer, the new circuit can also be used to drive power mosfet devices with the same performance. overall the results obtained have shown that the proposed driving circuit makes the lgbt perform in a manner that gives increased efficiency and higher reliability. acknowledgements this work has been supported by the italian national research council, p.f. madess, and ministry of development of southern italy within the microelectronic research group. references [1] an investigation of the drive circuit requirements for the power insulated gate bipolar transistor (igbt). a.r. hefner, ieee transactions on power electronics. vol. 6. no 2. april 1991, pp. 208-219. [2] the application of an lgbt in a power electronic circuit. m. feldvob, h. amann, h. stut, l. lorenz, conf. rec. pcim, norimberga, 1991, pp. 475- 489. [3] gate charge leads to easy drive design for power mosfet circuits. m. melito, f. portuese, conf. rec. pcim, munich, 1990, pp. 237-243. [4] static and dynamic behaviour of paralleled lgbts. r. letor, conf. rec. ieee, as seattle, 1990, pp. 1604- 1612. [5] switching with lgbt: how to obtain better performance. a. galluzzo, r. letor, m. melito, conf. rec. pcim, norimberga, 1991, pp. 465- 474. [6] optimization of the turn-on and turn-off behavior of igbt modules. p. mourick, conf. rec. pcim, nuremburg, 1991, pp. 460- 465. [7] safe behavior of igbts submitted to a dv/dt, r. letor, m. melito, conf. rec. pcim, munich, 1990, pp. 25-32. [8] design aspects of high power pwm inverters with lgbt. y. tadros, g. junge, s. salama, conf. rec. epe, firenze, 1991, pp. 83-88. [9] a modular gate drive circuit for insulated gate bipolar transistors. s.k. biswas, b. basak, k.s. rajashekara, conf. rec. ieee las, dearborn, 1991, pp. 1490- 1496.
application note 6/6 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from i ts use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specification mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmic roelectronics. the st logo is a trademark of stmicroelectronics ? 1999 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com


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